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Project Quartus

102

hours

2

developers

Development of the CAM Module

Development of a CAM module for conditional access to decode a television stream using block encryption according to the GOST R 34.12-2015 standard and supporting the CAS-RSCC system. The project aims to develop a CAM module for conditional access designed to decode television streams using block encryption as per the GOST R 34.12-2015 standard. The module will be integrated into the CAS-RSCC system to ensure secure and reliable access to encrypted content. The foundation of the module is an architecture based on FPGAs (SOC) with an ARM or RISC-V processor, offering high performance and flexibility in executing key functions such as demultiplexing and decrypting the transport stream. The CAM module will support the Common Interface (CI) and meet the requirements of the EN 50221 and ETSI TS 101 699 standards for interaction with host receivers. Special attention is given to security: protection mechanisms for encryption keys and software are implemented, including the use of a Trusted Execution Environment (TEE) and support for RSA and SHA-256 algorithms. The module’s firmware will allow software updates via the transport stream, with support for rollback to previous versions if necessary. VHDL, Quartus Prime, ModelSlim, Precision RTL

VHDL

Quartus Prime

ModelSlim

Precision RTL

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